Sicoya’s approach of monolithically integrating both the analog electronics and the optics in the same silicon chip (EPIC) offers disruptive benefits to cost, power efficiency, data density, and production scalability.
- EPIC eliminates multiple components by combining a variety of electronic and optical functions into a single die
- Reduces manufacturing cost by simplifying packaging/assembly
- Wafer level testing of electrical and optical functions optimizes cost model
- Cost-effective 8” wafer process
- Combining electronic/photonic elements eliminates electrical channels between components
- Eliminating electrical traces improves power efficiency by eliminating power required to communicate between chips
- High data rates (>200Gb/s) can be achieved by tightly coupling electronic and photonic elements
- Single-chip solutions result in fewer traces between components, resulting in space savings
- Data-rates are maximized by tightly coupling electronic/photonic components
- Integrated Monitoring/Control loops reduce pad count, which reduces overall chip area
- Compatible with multi-core fiber for ultra-high density
- Signal quality of the E/O and O/E are optimized in highly precise lithographic processes
- High volume is achieved through wafer-scale manufacturing processes
- Wafer-level production testing of optical and electrical functions optimizes down-stream yield
- Simplified packaging enabled by EPIC reduces assembly complexity